Table of contents
There are two types of memory elements based on the type of triggering that is suitable to operate it.
Latches operate with enable signal, which is level sensitive. Whereas, flip-flops are edge sensitive. Let’s discuss about flip-flops in next module. Latches are basic storage elements that operate with signal levels (rather than signal transitions). They are level-sensitive devices, that are useful for the design of the asynchronous sequential circuits. They, generally, have 2 inputs and 1 output pins. And the process where the output of the circuit depends on the previous state and the present input value(s) supplied, with the output value being constant (changing only for a particular condition in the input(s)), is referred to as latching.
Differences between latches and flip-flops
|Level triggered||Edge triggered|
|Asynchronous device||Synchronous device|
|Doesn’t contain clock signal||Contains a clock signal|
|It will change its state as long as it is enabled||It will change its state only during a given clock cycle|
|Consumes less power||Consumes more power|
|Examples: D-Latch, T-Latch||Examples: D-Flip flop, T-Flop flop|
Now, let us discuss about SR Latch, D Latch, JK Latch & T Latch one by one.